The present invention has utility in applications requiring the conversion of an analog signal into a digital signal, for example for computer sensing of analog information in an automotive control system. To further illustrate, in an automotive engine control system, a microcomputer requires analog signal information from various transducers to be converted into digital signal information before it can be processed by the microcomputer. Examples of such analog signal information are the outputs of sensors for manifold pressure, oxygen, rotational speed, operator input, battery voltage, anti-knock, etc.
In a typical automotive application, many different analog signals need to be converted. The digital values of the converted analog signals are utilized by the system for many different purposes.
In a A/D converter system comprising a data bus (e.g. of 16 bits) which has a larger width than the converted digital values (e.g. 8 bits), the problem arises as to how to transmit the digital value of fewer bits over the bus of greater bits.
For instance, some applications desire the result right-justified, so that multiple samples can easily be averaged. Other programs desire the result to be left-justified, so that it appears like a 16-bit value in terms of magnitude. Digital signal processing applications often desire left-justified data in two's complement (signed) format with trailing zeros, where the number system is signed, fixed-point fractions. When the A/D conversion is in a closed-loop control application, it is undesirable to burden the application processor software with the task of adjusting the data format.
It is known in the prior art to hard-wire an N-bit bus so as to be left-justified or right-justified. Alternatively, external multiplexers could be used to let the application software choose the desired justification format.
However, known A/D converters typically generate the digital result in a fixed format, either magnitude only, or the two's complement.
There is a significant need to provide an A/D converter system in which the digital results may be read in any of several desired formats, without requiring excessive on-chip or off-chip circuitry.